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Thursday, 31 October 2013

Verilog Code for 8-Bit ALU

Sr. No.
Name of the Pin
Direction
Width
Description
1
a
Input
8
Data Input
2
b
Input
8
Data Input
3
opcode
Input
4
Control Logic for different operation
4
Op
Output
8
Output
There are total three inputs and one output signals. Two inputs a and b are input signals on which operation is going to be performed according to opcode input. a and b are 8 bit wide. opcode is 4 bit wide, so we can do sixteen different operations. The design code is given below. This is simple ALU. 

module alu (op,a,b,opcode);

  output reg [7:0] op;     //output of alu
   input [7:0]     a,b;    //inputs to alu
   input [3:0] opcode;     //control signal for different operation

always @(*)
begin
 case (opcode)
   4'b0000 : begin op = a + b; $display("Addition operation"); end
   4'b0001 : begin op = a - b; $display("Subtraction operation"); end
   4'b0010 : begin op = a * b; $display("Multiplication operation"); end
   4'b0011 : begin op = a / b; $display("Division operation"); end
   4'b0100 : begin op = a % b; $display("Modulo Division operation"); end
   4'b0101 : begin op = a & b; $display("Bit-wise AND operation"); end
   4'b0110 : begin op = a | b; $display("Bit-wise OR operation"); end
   4'b0111 : begin op = a && b; $display("Logical AND operation"); end
   4'b1000 : begin op = a || b; $display("Logical OR operation"); end
   4'b1001 : begin op = a ^ b; $display("Bit-wise XOR operation"); end
   4'b1010 : begin op = ~ a; $display("Bit-wise Invert operation"); end
   4'b1011 : begin op = ! a; $display("Logical Invert operation"); end
   4'b1100 : begin op = a >> 1; $display("Right Shift operation"); end
   4'b1101 : begin op = a << 1 ; $display("Left Shift operation"); end
   4'b1110 : begin op = a + 1; $display("Increment operation"); end
   4'b1111 : begin op = a - 1; $display("Decrement operation"); end
   default:op = 8'bXXXXXXXX;
 endcase
end

endmodule

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