Verilog Code for 16x4 Bi-Directional Port Memory

Sr. No.	Name of the Pin	Direction	Width	Description
1	address	Input	4	Input address i.e. address bus
2	out_en	input	1	output enable
3	rd_en	Input	1	If 1 read from memory
4	wr_en	Input	1	If 1 write in to memory
5	data	Input/Output	4	Output read/write from/to memory i.e. bidirectional data bus

module memory_16x4_bi(data, clk, out_en, address, rd_en, wr_en );
   inout [0:3] data;
   input clk;
   input out_en;
   input rd_en, wr_en;
   input [0:3] address;
   reg [0:3] memory [0:15];
   reg [0:3] data_out;



   assign data = out_en ? data_out : 4'bZ;
 
   always@(posedge clk)
     begin
      if(rd_en)
        data_out = memory[address];
      else if (wr_en)
        memory[address] = data;
      else
        data_out = 4'bx;
     end
 
endmodule