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Sunday 10 January 2016

Verilog and VHDL Code for Digital Clock

Given below code is Simple Digital Clock. It accepts one input as 50 MHz clock and gives three output as Hour, Minute and Second. This code converts internally 50 MHz into 1 Hz Clock Frequency. In this code first process converts frequency from 50 MHz to 1 Hz. in the second process at every clock event second value will increment but up to 59 and then again zero. Same way Minute value will also increment after second value will reach to 59, but up to 59. Hour value will increment when minute value reaches to 59 and goes up to 23 and again goes to zero. In the last integer values of ss, mm and hr are converted into standard logic vector and assign to Second, Minute and Hour respectively. If you want to display this clock on your 7 segment or LCD display then you have write another code that accepts these inputs and generates equivalent output to be displayed.

Friday 8 January 2016

VHDL Code for Bitonic Sorter

Bitonic Sorter is one kind of Sorting Algorithm. This algorithm invented by Ken Batcher. You can find more detail about this algorithm over here.
Bitonic Sorter

Wednesday 6 January 2016

VHDL Code for Generation of 1 KHz and 1 Hz Frequency from 100 MHz Frequency

Given below VHDL code will generate 1 kHz and 1 Hz frequency at the same time. This design takes 100 MHz as a input frequency. For this we need counter with different values and that will generate above frequencies. There is a simple formula to find this count value and it is given below.

Count Value = (Input Frequency) / (2 * Output Frequency).
In our case Count Value for 1 kHz is (100 * 10^6) / (2 * 1 * 10^3) = 50,000. After 50,000 count, level of msClk will change.
and for 1 Hz is (100 * 10^6) / (2 * 1) = 5,00,00,000.

Name of Pins
Direction
Data Width
sysClk
Input
1
msClk
Output
1
secClk
Output
1

Sunday 3 January 2016

VHDL Code for Debouncer Circuit

The debouncer circuit is useful when we specially use push button switches in our design. This design code will generate high pulse for 1 millisecond after press and goes back to low. If you want to input a manual switch signal into a digital circuit you'll need to debounce the signal so a single press doesn't appear like multiple presses. Pin description is given below.
Name of Pins
Direction
Data Width
msClk
Input
1
pb
Input
1
debouncedPb
Output
1

Saturday 5 December 2015

VHDL Code of (7,4) Hamming Code Encoder

Name of Pins
Direction
Width
Datain
Input
4
Hamout
Output
7


Hamming code is useful in Error Correction in Linear Block Code. This code will encode four bits of data and generate seven bits of code by adding three bits as parity bits. It was introduced by Richard W. Hamming. This algorithm can detect one and two bit error and can correct one bit error. Given below code will generate (7,4) Systematic Hamming Encoder. This encoder will use Least Significant 4 bits as data inputs and Most 3 significant bits as a parity bits.
Parity bits equations are given below

p0 = datain(0) xor datain(1) xor datain(3)
p1 = datain(0) xor datain(2) xor datain(3)
p2 = datain(1) xor datain(2) xor datain(3)