Difference between $display and $strobe using Example in Verilog

Case 1 :

module case_1;
reg [31:0] data;

initial
 begin
  #20 data=50;
  $strobe("Strobe",$time,data);
  $display("display",$time,data);
  data=30;
 end

endmodule 

Ans. :

	Time	Data
$display	20	50
$strobe	20	30

---------------------------------------------------------------------------------------------

Case 2:

module case_2;
reg [31:0] data;

initial
 begin
  #20 data<=50;
  $strobe("Strobe",$time,data);
  $display("display",$time,data);
  data<=30;
 end

endmodule 

Ans. :

	Time	Data
$display	20	X
$strobe	20	30

---------------------------------------------------------------------------------------------

Case 3 :

module case_3;
reg [31:0] data;

initial
 begin
  #20 data=50;
  $strobe("Strobe",$time,data);
  $display("display",$time,data);
  data<=30;
 end

endmodule 

Ans. :

	Time	Data
$display	20	50
$strobe	20	30

---------------------------------------------------------------------------------------------

Case 4 :

module case_4;
reg [31:0] data;

initial
 begin
  #20 data<=20;
  $strobe("Strobe",$time,data);
  $display("display",$time,data);
  data=30;
 end

endmodule

Ans. :

	Time	Data
$display	20	X
$strobe	20	30