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Tuesday, 30 September 2014

Logic Gates with Truth Table in Digital World

Logic gates are basic building blocks of any digital circuits. Logic gates are electronics device that gives output on the different combinations of digital inputs. Different Logic gates are constructed using different technologies depending on different Logic Family like TTL, CMOS, DTL, ECL etc. Logic Circuits include devices such as multiplexers, registers, memory units, processors, which contains more than 100 millions Logic Gates.

There are total six Logic Gates are available
  1. AND Gate.
  2. OR Gate.
  3. NOT Gate.
  4. NAND Gate.
  5. NOR Gate.
  6. EX-OR Gate.
  7. EX-NOR Gate.

Monday, 4 August 2014

Verilog Code for Gray Counter

Gray code is one kind of binary number system where only one bit will change at a time. Today gray code is widely used in digital world. This will helpful for error correction and signal transmission. Gray counter is also useful in design and verification in VLSI domain. This code will generate gray code. Find out VHDL Code of Gray Counter here.

Wednesday, 23 July 2014

Implement Divide by 2, 4, 8 and 16 Counter using Flip-Flop

Counter plays a very important role into chip designing and verification. It is a very essential part of the VLSI Domain. Whenever we want to design or verify our design, most of the time we require slowing down frequencies. We can suppress this frequency using this counter by 2, 4, 8 or 16 times. Here circuit diagram and verilog code are given below.


Monday, 21 July 2014

Design 4-bit Linear Feedback Shift Register(LFSR) using Verilog Coding and Verify with Test Bench

Linear Feedback Shift Register is a sequential shift register with combinational feedback logic around it that causes it to pseudo randomly cycle through a sequence of binary values. Feedback around LFSR's shift register comes from a selection of points in the register chain and constitute either XORing or XNORing these points to provide point back into the register. The LFSR basically loops through repetitive sequences of pseudo random values. The maximum length of sequence is (2^n) - 1. Find out VHDL Code Here.

Saturday, 12 July 2014

Verilog Code for Sequence Detector "101101"

Here below verilog code for 6-Bit Sequence Detector "101101" is given. This code is implemented using FSM. FSM for this Sequence Detector is given in this image.

In this Sequence Detector, it will detect "101101" and it will give output as '1'.