S.No.
|
Name
|
Direction
|
Width
|
Remark
|
1
|
Req_1
|
Input
|
1
|
Request for 1st user
|
2
|
Req_2
|
Input
|
1
|
Request for 2nd user
|
3
|
Req_3
|
Input
|
1
|
Request for 3rd user
|
4
|
Req_4
|
Input
|
1
|
Request for 4th user
|
5
|
Clk
|
Input
|
1
|
Clock signal
|
6
|
Rst_a
|
Input
|
1
|
Reset signal
|
7
|
Grant_1
|
Output
|
1
|
Grant for 1st user
|
8
|
Grant_2
|
Output
|
1
|
Grant for 2nd user
|
9
|
Grant_3
|
Output
|
1
|
Grant for 3rd user
|
10
|
Grant_4
|
Output
|
1
|
Grant for 4th user
|
The above design is a Priority Resolver circuit which gives priority to the requests of that user which was given grant the most earlier. In other way the user which was given grant most recently is given least priority. If the two requests have ,by chance, conflict in getting the grant, they will be issued the grant signal according to the following sequence:
req4 > req3 > req 2 > req1