VHDL Code for Debouncer Circuit

The debouncer circuit is useful when we specially use push button switches in our design. This design code will generate high pulse for 1 millisecond after press and goes back to low. If you want to input a manual switch signal into a digital circuit you'll need to debounce the signal so a single press doesn't appear like multiple presses. Pin description is given below.

Name of Pins	Direction	Data Width
msClk	Input	1
pb	Input	1
debouncedPb	Output	1

VHDL Code of (7,4) Hamming Code Encoder

Name of Pins	Direction	Width
Datain	Input	4
Hamout	Output	7

Hamming code is useful in Error Correction in Linear Block Code. This code will encode four bits of data and generate seven bits of code by adding three bits as parity bits. It was introduced by Richard W. Hamming. This algorithm can detect one and two bit error and can correct one bit error. Given below code will generate (7,4) Systematic Hamming Encoder. This encoder will use Least Significant 4 bits as data inputs and Most 3 significant bits as a parity bits.

Parity bits equations are given below

p0 = datain(0) xor datain(1) xor datain(3)

p1 = datain(0) xor datain(2) xor datain(3)

p2 = datain(1) xor datain(2) xor datain(3)

Number System in Digital Design

To represent something we require symbols and to represent count we require Numbers. Number System is very important in Digital Technology. The most commonly used number systems are Decimal(Base 10), Binary(Base 2), Hexadecimal(Base 16) and Octal(Base 8). We all are very much familiar with Decimal Number System.

Verilog Code for Electronic Combination Lock System using FSM

Sr. No.	Name of Pin	Direction	Width	Description
1	clk	Input	1	Clock Signal
2	rst	Input	1	Reset Signal
3	b0	Input	1	Input Digit “0”
4	b1	Input	1	Input Digit “1”
5	unlock	Output	1	Status for unlock

In this lock system, only two digits are used to unlock system. With the help of "0" and "1", the lock will be unlock but with specific pattern. This lock will be unlock with "01011" code. If this pattern will be identified by lock then lock will be become open and output unlock bit will be "1", otherwise lock remain close and unlock bit will be "0". This Lock System is developed using FSM and there are total six stages.

Data Types in Verilog Language

A Data Type is a classification of various class of Data, such as Real, Integer or Boolean. And It is important because it determines the value of that type; which operation can be done on values of that type; the real meaning of that data. Every language has its own Data Type.

In the same way, Verilog has it's own Data Types. There are mainly eight Data Types in Verilog which are listed below.

1. Value Set
2. Nets
3. Registers
4. Integers
5. Time
6. Real
7. Parameter
8. Arrays