We have two inputs A, B. Connect one of Mux's input to logic '1' and second to input 'B'. Connect input 'A' to selection line of Mux. So, output will give ORing operation of two inputs A, B.
Search This Blog
Monday 9 December 2013
Implement AND Gate using 2x1 Multiplexer
We have two inputs A, B. Connect one of Mux's input to logic '0' and second to input 'B'. Connect input A to selection line of Mux. So, output of Mux will give anding operation of two inputs A and B.
Implement BUFFER Gate using XOR Gate
Connect one of XOR gate's input to logic '0' and connect second to input 'a'. So XOR gate will give output as input.
Implement NOT Gate using XOR Gate
Connect one of XOR gate's input to logic 1 and connect second input to input 'a'. So output of XOR gate will give inverted output of input.
Wednesday 4 December 2013
Difference between $display and $strobe using Example in Verilog
Case 1 :
module case_1; reg [31:0] data; initial begin #20 data=50; $strobe("Strobe",$time,data); $display("display",$time,data); data=30; end endmodule
Ans. :
Time
|
Data
| |
$display
|
20
|
50
|
$strobe
|
20
|
30
|
---------------------------------------------------------------------------------------------
Subscribe to:
Posts (Atom)