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Saturday, 30 May 2015

Verilog Code for Electronic Combination Lock System using FSM

Sr. No.
Name of Pin
Direction
Width
Description
1
clk
Input
1
Clock Signal
2
rst
Input
1
Reset Signal
3
b0
Input
1
Input Digit “0”
4
b1
Input
1
Input Digit “1”
5
unlock
Output
1
Status for unlock

In this lock system, only two digits are used to unlock system. With the help of "0" and "1", the lock will be unlock but with specific pattern. This lock will be unlock with "01011" code. If this pattern will be identified by lock then lock will be become open and output unlock bit will be "1", otherwise lock remain close and unlock bit will be "0". This Lock System is developed using FSM and there are total six stages.